news 28 Posted November 17, 2013 Dear editor, We have just posted the *BIOS Option Of The Week* *- Errata 123 Option*. Quote : Since 1999, we have been developing the BIOS Optimization Guide, affectionately known as the BOG. From a meager beginning of a single page, it now covers over 440 BIOS options. As old BOG readers will know, we started offering two editions of the BOG since Revision 8.0 - a simplified edition and the complete edition. Normally, the complete edition is only available to subscribers who help sponsor the development of the guide through a small fee. However, that changes today! From now on, we will post a BIOS option from the complete edition of the BIOS Optimization Guide every weekend. This week, we will be taking a look at the *Errata 123 Option* setting. Here's an excerpt : *"These processors have an internal data path that allows the processor to bypass the L2 cache and initiate an early DRAM read for certain cache line fill requests, even before receiving the hit/miss status from the L2 cache. However, at low core frequencies, the DRAM data read may reach the processor core before it is ready. This causes data corruption and/or the processor to hang..."* Link : *http://www.techarp.com/showarticle.aspx?artno=606*<http://www.techarp.com/showarticle.aspx?artno=606> Icon : *http://www.techarp.com/article/BOG_Weekly/BOG_weekly_big.png*<http://www.techarp.com/article/BOG_Weekly/BOG_weekly_big.png> We hope you will post this news on your website. Please feel free to send your news to news ( -at -) techarp.com and we will reciprocate. Thanks! *Team ARP* Tech ARP : *http://www.techarp.com/* <http://www.techarp.com/> Tech ARP : *http://techarp.com/* <http://techarp.com/> -- Share this post Link to post